The Tower Semiconductor RF-SOI process family combines a 3–7 metal layer CMOS process with options for 1.2V, 1.8V, 2.5V, and 5V transistors. The technology offering, with four generations in high volume manufacturing across both 200mm and 300mm fabs, is further enhanced by silicon proven accurate models and design libraries, and world-class design enablement.
These processes are well-suited for products requiring isolation such as cellular switches. Excellent channel isolation better than >40 dB, insertion loss of <0.35 dB, low harmonics of better than 110dBc at cellular power levels and inter-modulation distortion below -117 dBm have been demonstrated. Low noise amplifiers can also be integrated with specialized low-noise, high-gain, high-linearity devices, and low-loss inductors realized with thick Cu or Al layers. Specialized high voltage handling switch devices enable robust performance under high RF power and high VSWR conditions, ideal for applications such as antenna tuning and basestations. Selective shrinking of key design rules supports smaller switch and digital area.
In addition to the active devices, process options include silicided and unsilicided poly resistors, RF metal-insulator-metal (MIM) capacitors, metal-fringe capacitors (MFCs), scalable geometry inductors, fixed geometry inductors, fixed geometry baluns, and transformers.
Substrate options include “thin-film” for the best Ron-Coff performance and “thick-film” for bulk-like behavior of the active MOSFETs, free of floating body effects.
Circuit designers new to the platform may draw upon a rich library of characterized demonstration IP and reference flows.
The platform is supported by our Multi-Project Wafer shuttle program for fast prototyping.